In graphics systems, the rapid access of memory is of paramount importance, since the rate in which memory can be accessed has an impact on the rendering performance of picture elements (pixels) on a display device. Thus, memory organizations which enable the writing of data to and the reading of data from memory in an efficient manner are continually being sought.
Previously, memory has been organized, arranged and addressed in many ways in order to increase performance. For example, a double frame buffer memory has been used to increase the speed at which pixels can be rendered. In a double buffered system, two frame buffers are used so that one buffer can be updated while the other buffer can be scanned out to the screen.
In another example, in United States Patent entitled, "Frame Buffer Memory," issued on Jul. 5, 1988 and having U.S. Pat. No. 4,755,810, a memory organization is described in which a random access memory is organized into tiles. Each tile comprises an array of pixel data word rows and columns corresponding to a separate rectangular subset of horizontally and vertically contiguous display pixels. The RAM is addressed by sequentially applying row and column addresses. A first subset of the column address determines which pixel word row within each tile is addressed, while a second subset of the column address determines which pixel word column within each tile is addressed. The first and second subsets of the column address are selectively incremented and decremented such that words within a selected tile row or column may be successively addressed allowing rapid reading and writing of sequences of pixel data corresponding to contiguous rows or columns of display pixels.
In a further example, United States Patent entitled "High-Speed Dual Mode Graphics Memory" having U.S. Pat. No. 4,845,640 and issued on Jul. 4, 1989, describes a high-speed graphics memory. The memory provides line mode and area mode data transfer at high speeds and comprises a frame buffer structure with unique address alignment and corresponding data manipulation to provide line mode and area mode pixel data transfer of comparable time intervals.
Even though numerous memory organizations have been defined, a need still exists for a memory system that allows even faster access of information and is capable of being accessed efficiently. A further need exists for a memory organization that can easily be expanded. Yet further, a need exists for a memory system that is easily scannable to an output device.